1. Field of the Invention
The present invention relates to an image forming apparatus having a clock generating portion.
2. Description of the Related Art
Some conventional image forming apparatuses use a high speed clock whose frequency is several times higher than a frequency of an image clock in order to accomplish high quality image processing and precise position control. An image forming apparatus described in Japanese Patent Application Laid-Open No. H09-183250 uses a high speed clock to adjust the timing of writing an image with high precision. An image forming apparatus described in Japanese Patent Application Laid-Open No. 2007-152731 uses a high speed clock to correct the tone of an image with high precision. The image forming apparatuses of Japanese Patent Application Laid-Open No. H09-183250 and Japanese Patent Application Laid-Open No. 2007-152731 generate a high speed clock with the use of a phase-locked loop circuit (hereinafter, referred to as PLL circuit).
In recent years, image forming apparatuses have been demanded to have improved image quality and the frequency of a high speed clock generated in a clock generating portion of an image forming apparatus has been increasing more and more. In line with that, the increase in the power consumption and heat generation of the clock generating portion is causing a problem.